1. Field of the Invention
Embodiments of the invention relate to a method for cleaning a substrate and a related method for fabricating a semiconductor device. In particular, embodiments of the invention relate to a method for cleaning a substrate on which a silicon layer and a silicon germanium layer are formed and exposed, and a method for fabricating a semiconductor device using the method for cleaning.
This application claims priority to Korean Patent Application No. 2005-90466, filed on Sep. 28, 2005, the subject matter of which is hereby incorporated by reference in its entirety.
2. Description of the Related Art
Research into partial insulated field effect transistors (PiFETs) and multi bridged channel field effect transistors (MBC-FETs) are a part of the continuing effort to produce more densely integrated semiconductor devices.
Figure (FIG.) 1 illustrates a process for forming a conventional MBC-FET. FIG. 1 is a photograph showing a cross-section of a substrate after a silicon germanium layer and a silicon layer have been stacked sequentially and repeatedly on a silicon substrate, have been patterned, and a cleaning process has been performed on the substrate. In a conventional cleaning process, a solution (i.e., a mixed solution) called SC1 consisting of ammonium hydroxide (NH4OH), hydrogen peroxide (H2O2), and deionized water (H2O), and having a volume ratio of ammonium hydroxide (NH4OH) to hydrogen peroxide (H2O2) to deionized water (H2O) of 1:4:20, is used as a cleaning solution. However, SC1 etches silicon germanium nine times faster than it etches silicon. Therefore, as illustrated in FIG. 1, sidewalls of the silicon germanium layers may be recessed. During a subsequent process (i.e., after the cleaning process has been performed), the silicon germanium layer is removed, and a gate insulation layer and a conductive layer are formed in an area previously occupied by the silicon germanium layer. Therefore, when a length of the silicon germanium layer (i.e., a length in a substantially horizontal direction relative to the photograph of FIG. 1) is shortened, a channel length of a subsequently formed MBC-FET is reduced, making it difficult to operate the MBC-FET properly.
In a conventional method for forming a PiFET, after the silicon germanium layer is removed, a buried insulation layer is formed in the area previously occupied by the silicon germanium layer. Therefore, when a length of the silicon germanium layer is shortened, the length of the buried insulation layer is also shortened, so desired operations cannot be performed properly.
Also, in the interval of time after an etching process has been performed but before a cleaning process has been performed, a native oxide layer forms on the silicon layer and the silicon germanium layer exposed by the etching process. The thickness of the native oxide layer (i.e., the amount of a native oxide layer) that forms varies in accordance with the amount of time that passes between the etching and cleaning processes. The effectiveness (i.e., cleaning efficiency) of the cleaning process that uses SC1 varies in accordance with the thickness of the native oxide layer that forms between the etching and cleaning processes. Therefore, the results of the cleaning process are not uniform for each wafer.
Also, the hydrogen peroxide contained in SC1 may cause a new oxide layer to form on the silicon layer and the silicon germanium layer. Therefore, it may be difficult to perform a subsequent epitaxial growth process because of the new oxide layer. That difficulty in performing the subsequent epitaxial growth process may reduce the reliability of a semiconductor device such as a PiFET or an MBC-FET fabricated using the conventional cleaning process.